The 7th International
Mediterranean and Latin American
Hierarchy of Discrete Event Formalisms, (Keynote Speech at I3M 2010)
Norbert Giambiasi, LSIS, France
Since the mid-sixties, many discrete event formalisms have been proposed for abstraction, modelling and simulation of dynamic systems. Today, an extensive theory is available on timed discrete event formalisms under the Discrete Event Specification: DEVS (Zeigler, 1984) and Timed Automata (Alur and Dill, 1994). These two classes of formalisms have high expressive power allowing complex timed behaviour to be specified, verified and simulated. However, great expressive power is not always needed and can be, in some cases, inconvenient. This is why we believe that less expressive timed formalisms can constitute an improved response to certain classes of problems. Consequently, we propose a hierarchy of timed discrete event formalisms with increasing complexity and expressive power.† This hierarchy ranges from a formalism based on well-known sequential machines to the more expressive of them: DEVS (Zeigler, 1984), GDEVS (Giambiasi et al., 2000) and Timed Automata (Alur and Dill, 1994). These formalisms can be used in a hierarchical design approach from a first untimed model based on sequential machines to the specification of the complex timed behaviour in a DEVS model or Timed Automaton. In addition, these less expressive formalisms offer a progressive approach for the understanding of the basic concepts of discrete event modelling and simulation.